Hold time adjustment (2009)
This page describes 2009 activities, using 'bad pedestals'.
The delay time between starting the readout and writing to the MEB is put at the second LmReg register.
|Test runs: 08.07.2009|
|Run number||hex (A-side)||time [ns]||hex (C-side)||time [ns]|
The results from the analysis of the previous runs produced the following plots for each DDL:
|Selected values: 20.08.2009 (results from Marco)|
After an analysis of the run 80463, the following final values were chosen for 2009 (with bold we have the different values with respect to the previous table):
|Final selected values 2009|
Hold Time Adjustment (2010)
In 2010, we performed more tests by changing the readout phase and looking at residuals with respect to SPD and cluster shapes. The runs used were:
|time setting||-48 ns||- 33ns||-16ns||nominal||+16 ns|
|legend||not plotted||blue||red||black||red dashed|
| || ||111372|| || ||111689|
| || ||111373|| || ||111688|
| || ||111374|| || ||111686|
| || ||111403|| || ||111620|
The main result is shown in this figure:
which shows the z-residual wrt to SPD per DDL for the different time settings. The general trend is a relatively smooth apparent shift of the SSD as a function of readout time of a few 100 microns per 16 ns. However, there are clear differences between the various DDLs.
- DDL 514, 518, 519, 527, show a clear shift of 2-4 mm between the nominal setting and +16 ns, indicating a shift an entire strip width on one or both sides, as expected from the serial read-out, in the case where the read-out is set "as late as possible". DDLs that do now show this shift are read out slightly earlier, e.g. DDL 512 and 513, which have seem to have a larger spread in cable lengths.
- DDL 519 and 523 have large statistics and clearly show a gradual shift depending on the readout time for delta-t <= 0.
- DDL 515, 524, 527 seem to show a slightly different behaviour: almost no shift between two settings and then a shift with the next setting. This suggests that those DDLs have a 'stable region' for the readout.
Another way to get a feeling for the readout timing is by looking at the cluster shapes. We expect a fairly large fraction of single-strip clusters due to the charge-sharing properties of the strips. These plots show the number-of-strip distribution of P and N side separately, again per DDL and for the different time settings.
In most cases, the black line, nominal setting, seems to have the largest fraction of single-strip clusters and the smallest fraction of three-strip clusters, indicating that the nominal setting is optimal. In the cases where there was a large shift in dz for the +16ns setting (dashed red line), we also see more 3-strip clusters due to artificial sharing of the strips with +16 ns. Exceptions are:
- DDL 518 and 519: the -16 ns setting shows significantly fewer 3-strip clusters. Both these DDLs may be better of with -16ns readout
- DDL 520 and 526: show a larger fraction of 1-strip clusters for the +16 ns setting and no large dz shift, suggesting that those may be better set to +16ns. However, for those DDLs, the bad strip measurement suggests that +16 ns may be a bit late...
Ladder 507 showed a significant dependence z-residuals on z for the standard alignment procedure, suggesting that at least one of the sides is read-out at the wrong time. This ladder is connected to DDL 519 and 527. In the 'bad pedestal test' (SsdHoldTime09), DDL 519 showed one or a few ladders that may have slightly longer cables and be read out too late with the nominal setting. Here we show the mean z-residual per ladder in layer 5 for ladders connected to DDL 519:
Clearly, ladder 507 is an outlier with the nominal setting. This will improve when reading out 16 ns earlier. A side-effect of such a change is that it will cause apparent shifts in the other ladders connected to DDL519 as well. If we shift the readout to 16 ns earlier, that may cause an apparent shift for the entire DDL (but it may also just shift ladder 507 and keep the rest the same, we do not have enough statistics to know that with certainty).
Detailed plots for DDL 518, 519, 520, 526
In the above, it is argued that DDL 518 and 519 should be read out 16 ns earlier. Here are detailed ladder-by-ladder plots to support that. The legend is the same as above.
DDL 518 z-residuals
DDL 518 cluster shape (mean nstrip vs ladder)
DDL 518 shows a significant improvement in cluster shape for ladder 504 when going to -16 ns (red lines). Not enough statistics to judge residuals.
DDL 519 z-residuals
DDL 519 cluster shape (mean nstrip vs ladder)
DDL 519 ladder 507 is an outlier in the nominal setting, residuals move back and cluster shape improves at -16 ns (red lines).
DDL 520 and 526 may benefit of reading out at +16 ns.
DDL 520 z-residuals
DDL 520 cluster shape (mean nstrip vs ladder)
DDL 520 cluster shapes improve for all ladders at +16 ns (dashed red). Residuals show uniform shift; maybe slightly flatter for layer 6 (right panels). No clear improvement/worsening of residuals. Not worth changing?
DDL 526 z-residuals
DDL 526 cluster shape (mean nstrip vs ladder)
DDL 526 cluster shapes improve slightly for all ladders at +16 ns (dashed red). Residuals unclear. Probably not worth changing.
- Recommend to change the time setting for DDL518 and 519 to 16ns earlier. Both DDLs seem to contain one ladder with above-average cable length (504 and 507). Reading out earlier improves cluster shapes and may make residuals more uniform. This will have implications for alignment of all ladders in those DDLs
- DDL 520 and 526 could be read out 16 ns later to improve cluster shapes. However, it is not clear what would be gained, so recommend to keep as-is. Also note that the cluster shapes from those DDLs are already quite good.
- For most DDLs, measurable apparent shifts of a few 100 microns occur when changing the timing (2-4 mm shift when moving to the next strip on one or both sides). We should consider including such shifts in the alignment at the 'half-ladder' level.