Frontemare di Trieste
Istituto Nazionale di Fisica Nucleare
Sezione di Trieste

DSI93 prototype

This prototype is produced on NTD 5-inch silicon wafers with a resistivity of 3 kOhmcm and a thickness of 300um. Its dimensions are 6,75X8.0cm2 with a sensitive-to-total-area-ratio of 86%. It is a bi-directional structure "butterfly", with a drift length of 33mm (see figure below).

The drifting charge is collected by two arrays of anodes (384 anodes for each half) having a pitch of 200um. The figure below shows one anode surrounded by the "grid" cathode whose function is to electrically separate two adjacent anodes.

The cathode strips, having a pitch of 120um, are biased through a high-voltage divider integrated in the detector and realized with high-resistivity p+ implantation. There are 265 cathodes for each half of the butterfly and therefore 530 cathodes per wafer side. In addition, the last cathodes near the anodes, 8 on the anode side and 12 on the p-side, are externally biased and constitute the collection zone. Guard cathodes are connected every two drift strips while in the collection region every cathode have its guard (figure below). The potential difference between two contiguous guards is twice that of two contiguous cathodes in the drift region, so this region is stressed from the breakdown point of view. In order to moderate the field at the junction's edges we used field plates on both cathodes and guard electrodes.

This design provides also a sequence of "point-like" MOS injectors (placed across the whole sensitive area of the detector, in the direction parallel to the anodes), in such a way that they could be controlled with a single external connection. The dimension of a single injector are 100x20um^2. There is a double array of injectors, 34 for each half, at a pitch of 2mm (i.e. one every 10 anodes).

The figure below shows the SDD mounted on a printed circuit board (the "detector card") that in turn is plugged into a motherboard. The motherboard provides all signals and bias voltages, as well as all connections and test points for the measurements.

This is an enlargement of the previous picture. Here we can see the front-end electronics connected to 160 anodes of one half. Each chip is a 32-channels, low noise, bipolar VLSI circuit specially designed for SDDs.



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