SVT Hit Buffer page

HOME : back to Stefano Belforte's home page

Old documents about 1997 1st prototype:

HB Specification and Design local copy (also as SVT note from the SVT home server).

Documents about 1999 pre-production prototype:

VME addresses map
schematics
pcb
firmware. Programming files for all Xilinx chips for use on Xilinx HW-130 programmer
timing
XILINX programming. All the details of what is inside the various XILINX EPLDs.
switch and jumper settings How to set hardware controls before test/use.
Board pictures: large, small, at B0, at B0 small, many, under test

Hit Buffer Production:

production logbook
Boards status and history by serial number
Test software
- quick VME only test w/o questions
- quick but complete test. Checks all functions except Spy Buffers, uses 2 additional HB's. Checks also leds and error lines. Do not exercise all tag_ram and HLM lines.
- full test of Tag RAM and Hit List Memory complex script that requires a bunch of small C programs and text inputs for hb_menu and merger_menu. Needs one extra HB and one Merger. N.B. Extension is .csh.txt instead of .csh to allow Netscape to open it w/o forcing download.
- random test Extensive test of data paths, operation and Spy Buffers. Mimics real life. Uses 2 mergers.

Hit Buffer Installation & Commissioning:

Hit Buffer Maintenance