SVT Vertical Slice Test

10/25/98


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Table of Contents

SVT Vertical Slice Test

GOALS I

GOALS II

GOALS III

Test Schedule

SVT final configuration (“dream test”)

Test Issues

Test strategy

Hardware List

Hardware Integration Steps

Hardware Configuration I (minimum new hardware) no G-link - brutalize HF - run fast, test slow

Hardware Configuration II (add G-link) brutalize HF - run fast, test slow

Hardware Configuration IIIa (add MRG: run & test fast) no XTRP - brutalize HF

Hardware Configuration IIIb (use MRG for real HF ops) no XTRP - run fast, check slow

Hardware Configuration IIIc (fast test & check) no XTRP

Hardware Configuration IIId (use old MRG as XTRP) only extensive tests - run slow

Hardware Configuration IVa (add 2nd Merger at end) only extensive tests - run slow

Hardware Configuration IVb (use Merger for XTRP) run fast, check slow only

Hardware Configuration IVc (use end MRG as XTRP) can’t add L2 i/f

Hardware Configuration V (add XTF)

Hardware Configuration VI (add XTRP)

Hardware Configuration VII (add SVXII) final configuration

Software

Software we need to develop

Needed Support from DAQ/FE group

How to get there

Author: Stefano Belforte

Email: Stefano.Belforte@pi.infn.it

Home Page: http://www.pi.infn.it/~belfo

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