A large  Associative Memory system for on-line track reconstruction
in a hadron collider experiment  has been designed,  prototyped  and
tested. This is the first such application of the Associative Memory
concept  and it is based on a full custom VLSI chip developed within
this project.  The  Associative Memory  is the heart of the  Silicon
Vertex Tracker,  which is part  of the  Level 2 trigger  of the  CDF
experiment, and is able to complete track finding in the CDF silicon
vertex detector  less then 1 microsec after detector readout is over.

This system is a multi-board project running on a common 30 MHz clock,
but critical parts multiply clock frequency to operate up to 120 MHz.
The  Associative Memory board  architecture,  design, implementation
and test are described. The main characteristics of this project are 
the use of sophisticated  clock distribution techniques and the high
density of components.